The continuing trend of scaling down integrated circuits has forced the semiconductor industry to consider new techniques for fabricating precise components at submicron levels. Along with the need for smaller components, there has been a growing demand for devices requiring less power consumption. In the manufacture of transistors, these trends have led the industry to refine approaches to achieve thinner cell dielectric and gate oxide layers.
In metal oxide semiconductor ("MOS") technology, small, high performance transistors require thin cell dielectrics and high integrity gate silicon dioxide layers. An ultrathin (.ltoreq.100.ANG.) dielectric layer should minimally comprise enhanced dielectric properties. However, several additional design considerations must be examined in the manufacture of ultrathin dielectric layers. These include uniformity in thickness, reliability, high dielectric constant, as well as imperviousness to electrical and thermal breakdown. Ultimately, high performance, ultrathin dielectric layers should also comprise a low diffusion rate for impurities, low interface state density, and be chemically stable. Nevertheless, the physical constraints of the materials and methods of fabrication employed have made the characteristics of the dielectrics less than the optimum.
Silicon dioxide, at thicknesses greater than 100.ANG., provides a cost effective, high quality dielectric layer for single crystal silicon, polycrystalline silicon ("polysilicon"), or amorphous silicon substrates. Nonetheless, for dielectric layers less than 100.ANG., silicon dioxide is known to have a high defect density. Silicon dioxide also exhibits poor characteristics as a diffusion mask against impurities.
In light of silicon dioxide's inherent limitations for dielectric layers of 100.ANG. or less, several alternatives have been developed. One such alternative is the use of silicon nitride (Si.sub.3 N.sub.4) as a dielectric layer. This layer can be formed on a substrate's surface through a process which includes Rapid Thermal Nitridation ("RTN"). Under RTN, the silicon substrate is exposed to either pure ammonia (NH.sub.3) or an ammonia plasma at temperatures approximately between 650.degree. C. and 1150.degree. C. for approximately 5 seconds to 60 seconds, depending on the flow rate, to form a silicon nitride film.
Precise ultrathin dielectric layers are currently fabricated employing RTN. However, these layers have several shortcomings. RTN-type ultrathin dielectrics lack uniformity in their overall composition. Furthermore, RTN-type ultrathin dielectrics have questionable reliability because of their electrical and thermal breakdown. Applying current RTN techniques, moreover, the maximum thickness of a silicon nitride layer formed is substantially in the range of 15.ANG. to 25.ANG.. This is attributed to the self-limiting characteristics of silicon nitride, when a silicon substrate or the like is exposed to a steady flow of NH.sub.3. As such, to form silicon nitride layers having thicknesses greater than 35.ANG., a subsequent layer of silicon nitride must be deposited superjacent. The present approach in forming a silicon nitride layer employing RTN, thus, is limited because a minimum of two steps are necessary--first growing an initial layer of silicon nitride and second depositing a subsequent layer of silicon nitride to achieve the targeted thickness. It is also limited because a high thermal budget is required.
With respect to thin gate oxides, two methods are presently employed. In the first method, thermal oxidation in dry or wet O.sub.2 ambients is used at elevated temperatures in a furnace to grow a silicon dioxide layer superjacent a silicon substrate. The second method for growing a thin gate oxide involves Rapid Thermal Oxidation ("RTO") in a rapid thermal processor at high temperatures over a short period of time.
These oxidation methods have substantial limitations. With respect to the furnace approach, gate oxides with a thickness in the 80.ANG. to 120.ANG. range are not as reliable. Moreover, RTO-type silicon dioxides require a high thermal budget and are further confined by throughput criteria which are not viable in a manufacturing environment.